The present invention relates to a system for managing an interprocessor common memory in a multiprocessor system.
In a conventional multiprocessor system of this type, when two processors use a common memory arranged therebetween, in order to protect data which is present in the same address space of the common memory from the other processor, exclusive OR control of the common memory is performed by hardware, or an address space is divided into two spaces to allow the two processors to use these different address spaces.
The above-described conventional system for managing the interprocessor common memory, however, cannot effectively operate processors in the multiprocessor system for the following reasons: (1) in exclusive OR control by hardware, if one processor occupies the common memory, since the operation of the hardware is stopped and the other processor is set in a ready state until the occupied state is released, access to the common memory is temporarily serialized and a specific exclusive OR control circuit is required in hardware, and (2) in the division of the address space in units of processors, since the address space to be used by two processors is divided, the utilization efficiency of the common memory is degraded.